HIGHLY EFFICIENT MULTIPLIER DESIGN WITH ADJUSTABLE TRUNCATION FOR POWER SAVING

Authors

  • Mr. V. PRASANTH Author
  • PALUKURI ANUSHA Author
  • MASINIDI SUBRAHMANAYAM Author

Abstract

In various applications, multipliers play a crucial role, demanding substantial power consumption due to frequent multiplication operations. To address this, this Project propose an adjustable approximate multiplier that dynamically truncates partial products to balance accuracy, energy efficiency, and performance. Our approach includes a high-accuracy 4-2 compressor and a flexible error compensation circuit, allowing users to tailor accuracy and power consumption based on specific requirements at runtime. Experimental results showcase a notable reduction in delay and in average power consumption compared to the conventional Wallace tree multiplier.

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Published

2025-11-21

How to Cite

HIGHLY EFFICIENT MULTIPLIER DESIGN WITH ADJUSTABLE TRUNCATION FOR POWER SAVING. (2025). Diversity and Biodiversity Archives, 5(2), 8-14. https://stanfordgroup.org/index.php/DBA/article/view/23

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